EPM3512AQC208-10-10N vs EPM3512AQC208-15N Vergleich
Detaillierter Direktvergleich von EPM3512AQC208-10-10N von Altera und EPM3512AQC208-15N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3512AQC208-10-10N - MAX 3000A CPLD 512 Macrocells 208-PQFP | Altera
EPM3512AQC208-10-10N ObsoleteAltera
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM3512AQC208-10-10N | EPM3512AQC208-15N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $31,20 | $20,50 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | — |
| Usable Gates | 10,000 | — |
| User I/Os | 172 | — |
| Logic Elements / LABs | 16 Logic Array Blocks | — |
| Propagation Delay (tPD) | 10 ns (-10 speed grade) | — |
| Maximum Frequency (fCNT) | 87 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V | 2.5 V / 3.3 V (MultiVolt) |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | Yes (IEEE Std. 1532 compliant) |
| Boundary-Scan (JTAG) | Yes, IEEE 1149.1 | — |
| PCI-SIG Compliance | PCI Local Bus Specification Rev 2.2 (at -10 speed grade) | — |
| Betriebstemperatur | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| Gehäuse | 208-pin PQFP (Plastic Quad Flat Pack) | PQFP-208 (QC208) |
| Montageart | Surface Mount | Surface Mount |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status] | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 512 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 172 |
| Typical Usable Gates | — | 12,000 |
| Number of Logic Elements | — | 512 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Operating Supply Voltage (VCCINT) | — | 3.3 V |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI (with external resistor) |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Support | — | Yes (BST/Boundary-Scan Test) |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |