EPM3512AQC208-2 vs EPM3512AQC208-10 Vergleich
Detaillierter Direktvergleich von EPM3512AQC208-2 von Altera und EPM3512AQC208-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512AQC208-2 | EPM3512AQC208-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,75 | $22,10 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| User I/O Pins | 172 | — |
| Logic Array Blocks (LABs) | 16 | 32 |
| Speed Grade | -2 | — |
| Gehäuse | PQFP-208 (QC) | 208-pin PQFP |
| Supply Voltage (Core) | 3.3 V | — |
| Output Drive Voltage | 2.5 V / 3.3 V programmable | — |
| Input Voltage Tolerance | 2.5 V / 3.3 V / 5.0 V | — |
| Process Technology | 0.30 µm EEPROM | — |
| Program/Erase Endurance | 100 cycles (typical) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (IEEE Std. 1532) |
| User I/O Banks | 4 | — |
| Betriebstemperaturbereich | Commercial (0C to +70C) | — |
| Montageart | Surface Mount | — |
| RoHS-Status | Non-compliant (legacy PQFP) | [DATA_NEEDED: RoHS status not in verified data] |
| Lead-Free | No (SnPb lead finish) | — |
| Security Bit | Yes (programmable) | — |
| Usable Gates | — | 10,000 |
| User I/Os | — | 208 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Frequency (fCNT) | — | 116.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |
| PCI Compliance | — | PCI Local Bus Spec Rev. 2.2 (-10 speed grade) |
| Betriebstemperatur | — | 0C to +70 C (commercial) |