EPM3512AQI208-10N vs EPM3256AQI208-10N Vergleich
Detaillierter Direktvergleich von EPM3512AQI208-10N von Intel und EPM3256AQI208-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512AQI208-10N | EPM3256AQI208-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,90 | $9,75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Family | CMOS EEPROM-based | — |
| Macro Cells | 512 | — |
| Logic Array Blocks (LABs) | 12 | — |
| User I/Os | 172 (max), 208-pin package | 161 |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Versorgungsspannung | 3.3 V | — |
| I/O Standards | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) | — |
| Package Type | PQFP-208 (FINE LINE BGA-style 256-pin land) | — |
| Pins | 256 (package), 208 used | — |
| Betriebstemperatur | 0C to 70C | -40 C to +85 C (industrial) |
| Montageart | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | JTAG (IEEE 1149.1) ISP |
| Compliance | RoHS status unknown from data | — |
| Boundary Scan | Built-in BST (IEEE 1149.1) | — |
| Configuration Memory | On-chip EEPROM, non-volatile | — |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| Logic Elements / LABs | — | 16 Logic Array Blocks (LABs) |
| Counter Frequency | — | 118.7 MHz (max, -10 speed grade) |
| Speed Grade | — | -10 |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Compatibility | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) |
| Gehäuse | — | 208-pin PQFP (Plastic Quad Flat Pack) |
| Process Technology | — | CMOS EEPROM |
| Hot-Socketing Support | — | Yes |
| RoHS-Status | — | Non-compliant (Pb-bearing PQFP package) |