EPM3512AQI208-10N vs EPM3256AQI208-10N 比較
詳細な並列比較: EPM3512AQI208-10N メーカー: Intel および EPM3256AQI208-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3512AQI208-10N | EPM3256AQI208-10N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $12.90 | $9.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Family | CMOS EEPROM-based | — |
| Macro Cells | 512 | — |
| Logic Array Blocks (LABs) | 12 | — |
| User I/Os | 172 (max), 208-pin package | 161 |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| 電源電圧 | 3.3 V | — |
| I/O Standards | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) | — |
| Package Type | PQFP-208 (FINE LINE BGA-style 256-pin land) | — |
| Pins | 256 (package), 208 used | — |
| 動作温度 | 0C to 70C | -40 C to +85 C (industrial) |
| 実装タイプ | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | JTAG (IEEE 1149.1) ISP |
| Compliance | RoHS status unknown from data | — |
| Boundary Scan | Built-in BST (IEEE 1149.1) | — |
| Configuration Memory | On-chip EEPROM, non-volatile | — |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| Logic Elements / LABs | — | 16 Logic Array Blocks (LABs) |
| Counter Frequency | — | 118.7 MHz (max, -10 speed grade) |
| Speed Grade | — | -10 |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Compatibility | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) |
| パッケージ | — | 208-pin PQFP (Plastic Quad Flat Pack) |
| Process Technology | — | CMOS EEPROM |
| Hot-Socketing Support | — | Yes |
| RoHS ステータス | — | Non-compliant (Pb-bearing PQFP package) |