EPM3512ATC144 vs EPM3256ATC144-10 Vergleich
Detaillierter Direktvergleich von EPM3512ATC144 von Altera und EPM3256ATC144-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM3256ATC144-10 - 256-Macrocell CPLD, 10ns, 144-TQFP | Intel / Altera
EPM3256ATC144-10 ObsoleteSpezifikationsvergleich
| Parameter | EPM3512ATC144 | EPM3256ATC144-10 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,75 | $9,75 |
| Family | MAX 3000A | — |
| Macrocells | 512 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 212 | — |
| Gehäuse | TQFP-144 (20x20 mm) | 144-pin TQFP (20x20 mm) |
| Core Supply Voltage | 3.3 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 (4-pin) | — |
| Maximum Frequency | 116 MHz | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | — |
| Product Terms per Macrocell | 32 (expandable) | — |
| I/O Standards | LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0 C to +70 C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 3 | — |
| RoHS-Status | Compliant (lead-free suffix variants available) | Non-compliant (original EPM3256ATC144-10); N suffix variant is lead-free |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | MAX 3000A |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Programmable Type | — | In-System Programmable (EEPROM-based, IEEE 1532) |
| Usable Gates | — | 5,000 |
| Number of I/O Pins | — | 116 |
| Propagation Delay (tpd max) | — | 10 ns |
| Counter Frequency (max) | — | 95.2 MHz |
| Core Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Logic Level Support | — | MultiVolt - 5.0 V, 3.3 V, 2.5 V |
| JTAG / Boundary Scan | — | Yes (IEEE 1149.1) |
| Process Technology | — | CMOS EEPROM |