EPM3512ATC144 vs EPM3256ATC144-10 对比

详细并排对比 EPM3512ATC144 出自 Altera 和 EPM3256ATC144-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3512ATC144 EPM3256ATC144-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $8.75 $9.75
Family MAX 3000A —
Macrocells 512 256
Logic Array Blocks (LABs) 16 16
Maximum User I/O Pins 212 —
封装 TQFP-144 (20x20 mm) 144-pin TQFP (20x20 mm)
Core Supply Voltage 3.3 V —
Programming Technology EEPROM (in-system programmable) —
JTAG Interface IEEE Std. 1149.1 (4-pin) —
Maximum Frequency 116 MHz —
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns] —
Product Terms per Macrocell 32 (expandable) —
I/O Standards LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant —
工作温度 0C to +70C (commercial) 0 C to +70 C (Commercial)
安装类型 Surface Mount Surface Mount
MSL 等级 3 —
RoHS 状态 Compliant (lead-free suffix variants available) Non-compliant (original EPM3256ATC144-10); N suffix variant is lead-free
Manufacturer — Intel (formerly Altera)
Series — MAX 3000A
Device Type — CPLD - Complex Programmable Logic Device
Programmable Type — In-System Programmable (EEPROM-based, IEEE 1532)
Usable Gates — 5,000
Number of I/O Pins — 116
Propagation Delay (tpd max) — 10 ns
Counter Frequency (max) — 95.2 MHz
Core Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
I/O Logic Level Support — MultiVolt - 5.0 V, 3.3 V, 2.5 V
JTAG / Boundary Scan — Yes (IEEE 1149.1)
Process Technology — CMOS EEPROM

数据手册与资源

浏览全部产品 创建 BOM 获取报价