EPM3512ATC256-10N vs EPM3512AFC256-10N Vergleich
Detaillierter Direktvergleich von EPM3512ATC256-10N von Altera und EPM3512AFC256-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512ATC256-10N | EPM3512AFC256-10N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $20,10 | $43,22 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | [DATA_NEEDED: number of LABs] |
| Maximum User I/O Pins | 208 | — |
| Gehäuse | FBGA-256 (FineLine BGA, 17x17 mm, 1.0 mm pitch) | 256-ball FBGA (17 mm x 17 mm) |
| Propagation Delay (tPD1) | 10 ns | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) - in-system programmable | — |
| Betriebstemperatur | 0 C to +70 C (commercial, "C" suffix) | — |
| Process Technology | 0.30 um CMOS EEPROM | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Usable Gates | — | 10000 |
| User I/O Pins | — | 208 |
| Operating Frequency (fMAX) | — | [DATA_NEEDED: fMAX MHz] |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Setup Time (tSU) | — | 4.5 ns |
| VCCINT (Core Supply) | — | 3.3 V |
| VCCIO (I/O Supply) | — | 3.3 V or 2.5 V |
| Technology | — | CMOS EEPROM-based, non-volatile |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| ISP Interface | — | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |