EPM5016DI-20 vs EPM5016DC-20 Vergleich
Detaillierter Direktvergleich von EPM5016DI-20 von Altera und EPM5016DC-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5016DI-20 | EPM5016DC-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,50 | $16,50 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-erasable CMOS) | EPLD (UV-Erasable Programmable Logic Device) |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Maximale Taktfrequenz | 62.5 MHz | 62.5 MHz |
| Total Inputs | 16 | — |
| Dedicated Inputs | 7 | 7 |
| Configurable I/O Pins | 8 | — |
| External Clock Inputs | 1 | — |
| Product Terms per Output | 8 | — |
| Output Functions per Macrocell | 8 | — |
| Technology | CMOS EPROM | — |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| Gehäuse | 20-pin Ceramic DIP (DI), windowed | — |
| Speed Grade | -20 (20 ns tPD) | -20 = 20 ns tPD |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Versorgungsspannung | [DATA_NEEDED: VCC nominal] | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Product Terms | — | 160 |
| I/O Pins | — | 8 |
| Maximum Supply Voltage | — | 5.25 V |
| Nominal Supply Voltage | — | 5.0 V |
| Process Technology | — | CMOS, UV-erasable |
| Architecture | — | PAL-type macrocell with Programmable Interconnect Array (PIA) |
| Package Type | — | 20-pin Ceramic DIP (Cerdip) with UV window |
| Package Suffix Code | — | DC = Ceramic DIP, Commercial |
| Programming Method | — | UV erase + EPROM-style programming via Altera programming hardware |