EPM5016DI-20 vs EPM5016DC-20 比較
詳細な並列比較: EPM5016DI-20 メーカー: Altera および EPM5016DC-20 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5016DI-20 | EPM5016DC-20 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.50 | $16.50 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-erasable CMOS) | EPLD (UV-Erasable Programmable Logic Device) |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| 最大クロック周波数 | 62.5 MHz | 62.5 MHz |
| Total Inputs | 16 | — |
| Dedicated Inputs | 7 | 7 |
| Configurable I/O Pins | 8 | — |
| External Clock Inputs | 1 | — |
| Product Terms per Output | 8 | — |
| Output Functions per Macrocell | 8 | — |
| Technology | CMOS EPROM | — |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| パッケージ | 20-pin Ceramic DIP (DI), windowed | — |
| Speed Grade | -20 (20 ns tPD) | -20 = 20 ns tPD |
| 動作温度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| 電源電圧 | [DATA_NEEDED: VCC nominal] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Product Terms | — | 160 |
| I/O Pins | — | 8 |
| Maximum Supply Voltage | — | 5.25 V |
| Nominal Supply Voltage | — | 5.0 V |
| Process Technology | — | CMOS, UV-erasable |
| Architecture | — | PAL-type macrocell with Programmable Interconnect Array (PIA) |
| Package Type | — | 20-pin Ceramic DIP (Cerdip) with UV window |
| Package Suffix Code | — | DC = Ceramic DIP, Commercial |
| Programming Method | — | UV erase + EPROM-style programming via Altera programming hardware |