EPM5016PC-1 vs EPM5016DC-15 Vergleich
Detaillierter Direktvergleich von EPM5016PC-1 von Altera und EPM5016DC-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5016PC-1 | EPM5016DC-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $10,75 |
| Family | MAX 5000 EPLD | — |
| Macrocells | 16 | 16 |
| Usable Gates | 200 | — |
| Logic Array Blocks (LABs) | 1 | 2 |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Frequency (fMAX) | 62 MHz | — |
| Setup Time (tSU) | [DATA_NEEDED: setup time ns] | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 4.75 V to 5.25 V |
| Supply Current (ICC) | 50 mA typical | — |
| Betriebstemperatur | 0 C to +70 C (commercial) | 0 °C to 70 °C (commercial) |
| Gehäuse | PDIP-20 (plastic DIP, through-hole) | Ceramic DIP-24 (windowed) |
| Pin-Anzahl | 20 | — |
| Configuration Memory | CMOS EEPROM (UV-erasable) | Non-volatile UV-erasable EPROM |
| Programming Interface | Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster) | — |
| RoHS-Status | Non-compliant (PDIP with SnPb leads, pre-RoHS era) | [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] |
| Device Family | — | MAX 5000 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | — | 4 |
| User I/O Pins | — | 12 |
| Pin-to-Pin Delay (tpd) | — | 15 ns |
| Maximum Frequency (fmax) | — | 71 MHz |
| Programming Voltage (VPP) | — | 12.75 V |
| Montageart | — | Through-Hole |
| Process Technology | — | CMOS EPROM |
| Lead Finish | — | [DATA_NEEDED: lead-free status] |