EPM5016PC-1 vs EPM5016DC-15 对比

详细并排对比 EPM5016PC-1 出自 Altera 和 EPM5016DC-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5016PC-1 EPM5016DC-15
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.95 $10.75
Family MAX 5000 EPLD —
Macrocells 16 16
Usable Gates 200 —
Logic Array Blocks (LABs) 1 2
Propagation Delay (tPD) 35 ns —
Maximum Frequency (fMAX) 62 MHz —
Setup Time (tSU) [DATA_NEEDED: setup time ns] —
Supply Voltage (VCC) 4.75 V to 5.25 V 4.75 V to 5.25 V
Supply Current (ICC) 50 mA typical —
工作温度 0 C to +70 C (commercial) 0 °C to 70 °C (commercial)
封装 PDIP-20 (plastic DIP, through-hole) Ceramic DIP-24 (windowed)
引脚数量 20 —
Configuration Memory CMOS EEPROM (UV-erasable) Non-volatile UV-erasable EPROM
Programming Interface Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster) —
RoHS 状态 Non-compliant (PDIP with SnPb leads, pre-RoHS era) [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant]
Device Family — MAX 5000
Product Type — EPLD (Erasable Programmable Logic Device)
Dedicated Inputs — 4
User I/O Pins — 12
Pin-to-Pin Delay (tpd) — 15 ns
Maximum Frequency (fmax) — 71 MHz
Programming Voltage (VPP) — 12.75 V
安装类型 — Through-Hole
Process Technology — CMOS EPROM
Lead Finish — [DATA_NEEDED: lead-free status]

数据手册与资源

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