EPM5016PC-1 vs EPM5016DI-20 Vergleich
Detaillierter Direktvergleich von EPM5016PC-1 von Altera und EPM5016DI-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5016PC-1 | EPM5016DI-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $8,50 |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 16 | 16 |
| Usable Gates | 200 | — |
| Logic Array Blocks (LABs) | 1 | — |
| Propagation Delay (tPD) | 35 ns | 20 ns |
| Maximum Frequency (fMAX) | 62 MHz | — |
| Setup Time (tSU) | [DATA_NEEDED: setup time ns] | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Supply Current (ICC) | 50 mA typical | — |
| Betriebstemperatur | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Gehäuse | PDIP-20 (plastic DIP, through-hole) | 20-pin Ceramic DIP (DI), windowed |
| Pin-Anzahl | 20 | — |
| Configuration Memory | CMOS EEPROM (UV-erasable) | — |
| Programming Interface | Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster) | — |
| RoHS-Status | Non-compliant (PDIP with SnPb leads, pre-RoHS era) | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | EPLD (UV-erasable CMOS) |
| Maximale Taktfrequenz | — | 62.5 MHz |
| Total Inputs | — | 16 |
| Dedicated Inputs | — | 7 |
| Configurable I/O Pins | — | 8 |
| External Clock Inputs | — | 1 |
| Product Terms per Output | — | 8 |
| Output Functions per Macrocell | — | 8 |
| Technology | — | CMOS EPROM |
| Programmable Interconnect | — | PIA (Programmable Interconnect Array) |
| Speed Grade | — | -20 (20 ns tPD) |
| Versorgungsspannung | — | [DATA_NEEDED: VCC nominal] |