EPM5032DI25 vs EPM5032DC20 Vergleich
Detaillierter Direktvergleich von EPM5032DI25 von Altera und EPM5032DC20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5032DI25 | EPM5032DC20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,10 | $8,20 |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | — |
| Output Macrocells | 16 | 16 |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (4.75 V to 5.25 V) |
| I/O Standard | TTL-compatible | — |
| Gehäuse | 24-pin Ceramic DIP (DI) with quartz window | 20-pin Ceramic DIP (DC) with UV window |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-erasable PLD (CPLD class) |
| Usable Gates | — | 600 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Frequency (Fmax) | — | 71.4 MHz |
| I/O Pins | — | 16 (bidirectional) |
| Total Inputs (max) | — | 24 |
| Clock Inputs | — | 1 (global) |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Montageart | — | Through-Hole (DIP) |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance] |