EPM5032DI25 vs EPM5032DC20 对比
详细并排对比 EPM5032DI25 出自 Altera 和 EPM5032DC20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5032DI25 | EPM5032DC20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $11.10 | $8.20 |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | — |
| Output Macrocells | 16 | 16 |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (4.75 V to 5.25 V) |
| I/O Standard | TTL-compatible | — |
| 封装 | 24-pin Ceramic DIP (DI) with quartz window | 20-pin Ceramic DIP (DC) with UV window |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-erasable PLD (CPLD class) |
| Usable Gates | — | 600 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Frequency (Fmax) | — | 71.4 MHz |
| I/O Pins | — | 16 (bidirectional) |
| Total Inputs (max) | — | 24 |
| Clock Inputs | — | 1 (global) |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| 工作温度 | — | [DATA_NEEDED: operating temperature range] |
| 安装类型 | — | Through-Hole (DIP) |
| RoHS 状态 | — | [DATA_NEEDED: RoHS compliance] |