EPM5032LC-25 vs EPM5032SC-25 Vergleich

Detaillierter Direktvergleich von EPM5032LC-25 von Altera und EPM5032SC-25 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5032LC-25 EPM5032SC-25
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $8,20 $8,20
Device Family MAX 5000 —
Architecture PAL-type EPLD (Erasable Programmable Logic Device) —
Technology CMOS, UV-erasable / OTP CMOS, UV-erasable or OTP
Macrocells 32 32
Product Terms 320 —
Dedicated Inputs 7 7
I/O Pins 16 bidirectional —
Total Inputs 24 (7 dedicated + 16 I/O used as input) —
Propagation Delay (tPD) 25 ns —
Maximum Internal Frequency 62.5 MHz —
Supply Voltage (VCC) 5 V ±10% (4.5 V to 5.5 V) 5 V (typical, 4.5 V to 5.5 V)
I/O Standard 5 V CMOS —
Betriebstemperatur 0 °C to +70 °C (commercial, "LC" suffix) —
Gehäuse 28-pin PLCC (JEDEC S-PQCC-J28), 1.27 mm pitch PDSO-28 (Plastic DIP Small Outline, SOIC-28 equivalent)
Montageart Surface Mount, socket-compatible Surface Mount
Configuration Cell Programmable interconnect array (PIA), OTP / UV-erasable —
RoHS-Status Not RoHS compliant (legacy Altera product) [DATA_NEEDED: RoHS status - legacy Altera part; verify with distributor]
Family — MAX 5000
Device Type — EPLD (Erasable/OTP Programmable Logic Device)
Bidirectional I/O — 16
Total Pin Count — 28
Speed Grade — -25
Propagation Delay (tpd) — 25 ns
Maximum Counter Frequency (fCNT) — 91 MHz
Interconnect — Programmable Interconnect Array (PIA)
Operating Temperature (Commercial) — 0C to +70C
Programming Method — Altera programming hardware (legacy iMPACT or MAX+PLUS II)

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