EPM5032LC-25 vs EPM5032SC-25 비교
다음의 상세 나란히 비교: EPM5032LC-25 제조: Altera 및 EPM5032SC-25 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5032LC-25 | EPM5032SC-25 |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $8.20 | $8.20 |
| Device Family | MAX 5000 | — |
| Architecture | PAL-type EPLD (Erasable Programmable Logic Device) | — |
| Technology | CMOS, UV-erasable / OTP | CMOS, UV-erasable or OTP |
| Macrocells | 32 | 32 |
| Product Terms | 320 | — |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 16 bidirectional | — |
| Total Inputs | 24 (7 dedicated + 16 I/O used as input) | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Internal Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V ±10% (4.5 V to 5.5 V) | 5 V (typical, 4.5 V to 5.5 V) |
| I/O Standard | 5 V CMOS | — |
| 동작 온도 | 0 °C to +70 °C (commercial, "LC" suffix) | — |
| 패키지 | 28-pin PLCC (JEDEC S-PQCC-J28), 1.27 mm pitch | PDSO-28 (Plastic DIP Small Outline, SOIC-28 equivalent) |
| 실장 유형 | Surface Mount, socket-compatible | Surface Mount |
| Configuration Cell | Programmable interconnect array (PIA), OTP / UV-erasable | — |
| RoHS 상태 | Not RoHS compliant (legacy Altera product) | [DATA_NEEDED: RoHS status - legacy Altera part; verify with distributor] |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable/OTP Programmable Logic Device) |
| Bidirectional I/O | — | 16 |
| Total Pin Count | — | 28 |
| Speed Grade | — | -25 |
| Propagation Delay (tpd) | — | 25 ns |
| Maximum Counter Frequency (fCNT) | — | 91 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Programming Method | — | Altera programming hardware (legacy iMPACT or MAX+PLUS II) |