EPM5032PC-20 vs EPM5032PC-15 Vergleich

Detaillierter Direktvergleich von EPM5032PC-20 von Altera und EPM5032PC-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5032PC-20 EPM5032PC-15
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $7,05 $8,10
Device Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) EPLD (Erasable PLD)
Programming Type OTP (One-Time Programmable) —
Macrocells 32 —
Usable Gates 600 600
Logic Blocks 2 Logic Array Blocks —
Product Terms 320 —
Dedicated Inputs 24 7
Bidirectional I/O Lines 16 —
Propagation Delay (tPD) 20 ns 15 ns
Maximale Taktfrequenz 62.5 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) —
Technology CMOS, 0.65 um process —
Architecture PAL-type macrocells with Programmable Interconnect Array (PIA) —
Gehäuse PDIP-28 (Plastic DIP, 28-pin) 28-pin PDIP (PC suffix = windowed CerDIP)
Betriebstemperatur [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
Montageart Through-Hole Through-Hole (DIP)
RoHS-Status [DATA_NEEDED: RoHS status] Non-compliant (CerDIP window, contains Be)
Macro Cells — 32
Logic Elements / LABs — 1 LAB (4 macrocells per group)
Maximum Internal Frequency — 76.9 MHz (some sources list 83.3 MHz)
Operating Voltage (VCC) — 5 V (typ.)
Technology Node — 0.8 micron CMOS
Configuration Memory — UV-Erasable EPROM
Bidirectional I/O Pins — 16
Total Array Inputs — 24
Pin/Package Suffix — PC = Windowed Ceramic DIP
Speed Grade — 15 (15 ns tPD)
Programming Tool — Altera Logic Programmer + MAX+plus II
Lead-Free — No

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