EPM5064JC-2 vs EPM5128GC Vergleich

Detaillierter Direktvergleich von EPM5064JC-2 von Altera und EPM5128GC von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5064JC-2 EPM5128GC
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $23,10 $19,20
Family MAX 5000 MAX 5000
Macrocells 64 128
Logic Array Blocks (LABs) 4 —
Propagation Delay (tPD) 45 ns —
Maximum Clock Frequency (fMAX) 50 MHz —
Usable Gates 1250 2,500
Dedicated Inputs 7 —
I/O Pins 28 —
Interconnect Programmable Interconnect Array (PIA) —
Technology CMOS, UV-erasable EPROM —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Programming Method UV-erase + EPROM programmer (not ISP) —
Gehäuse 28-pin CLCC (J-lead, ceramic, windowed) —
Betriebstemperatur [DATA_NEEDED: commercial or industrial grade] —
Compliance RoHS status unknown (ceramic/J-lead windowed part, legacy product) —
Logic Elements / LABs — [DATA_NEEDED: LAB count]
User I/Os — 68
Package Type — WPGA (Windowed Ceramic Pin Grid Array)
Package Code — WPGA
Number of Terminals — 68
Terminal Form — PIN/PEG (through-hole PGA with alignment pegs)
Package Shape — Square
Temperature Grade — Commercial
Supply Voltage (Vcc) — 5 V
Process Technology — CMOS, UV-erasable
Architecture — EPLD, programmable AND/OR array with fixed OR plane
Propagation Delay (tpd) — [DATA_NEEDED: tpd in ns]
Maximum Frequency (fmax) — [DATA_NEEDED: fmax in MHz]
Programmable Security Bit — Yes
Configuration Memory — Non-volatile UV-EPROM (windowed ceramic)
Montageart — Through-Hole (PGA socket required)
RoHS-Status — [DATA_NEEDED: RoHS compliance]

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern