EPM5064JC-2 vs EPM5128GC Comparación

Comparación detallada lado a lado de EPM5064JC-2 por Altera y EPM5128GC por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Comparación de especificaciones

Parámetro EPM5064JC-2 EPM5128GC
Marca Altera Altera
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida Obsolete Obsolete
Estado del stock In Stock In Stock
Precio unitario (USD) $23,10 $19,20
Family MAX 5000 MAX 5000
Macrocells 64 128
Logic Array Blocks (LABs) 4 —
Propagation Delay (tPD) 45 ns —
Maximum Clock Frequency (fMAX) 50 MHz —
Usable Gates 1250 2,500
Dedicated Inputs 7 —
I/O Pins 28 —
Interconnect Programmable Interconnect Array (PIA) —
Technology CMOS, UV-erasable EPROM —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Programming Method UV-erase + EPROM programmer (not ISP) —
Encapsulado 28-pin CLCC (J-lead, ceramic, windowed) —
Temperatura de funcionamiento [DATA_NEEDED: commercial or industrial grade] —
Compliance RoHS status unknown (ceramic/J-lead windowed part, legacy product) —
Logic Elements / LABs — [DATA_NEEDED: LAB count]
User I/Os — 68
Package Type — WPGA (Windowed Ceramic Pin Grid Array)
Package Code — WPGA
Number of Terminals — 68
Terminal Form — PIN/PEG (through-hole PGA with alignment pegs)
Package Shape — Square
Temperature Grade — Commercial
Supply Voltage (Vcc) — 5 V
Process Technology — CMOS, UV-erasable
Architecture — EPLD, programmable AND/OR array with fixed OR plane
Propagation Delay (tpd) — [DATA_NEEDED: tpd in ns]
Maximum Frequency (fmax) — [DATA_NEEDED: fmax in MHz]
Programmable Security Bit — Yes
Configuration Memory — Non-volatile UV-EPROM (windowed ceramic)
Tipo de montaje — Through-Hole (PGA socket required)
Estado RoHS — [DATA_NEEDED: RoHS compliance]

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