EPM5064JC1 vs EPM5064JI-1 Vergleich

Detaillierter Direktvergleich von EPM5064JC1 von Altera und EPM5064JI-1 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5064JC1 EPM5064JI-1
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $1,05 $3,40
Family MAX 5000 MAX 5000
Device Type CPLD / EPLD (Erasable PLD) EPLD (Erasable Programmable Logic Device)
Macrocells 64 64
Logic Array Blocks (LABs) 4 —
Usable Gates 1.25K —
Maximum Operating Frequency (fCNT) 62.5 MHz —
External Clock Input (max) 50 MHz —
I/O Pins 28 —
Dedicated Inputs 7 —
Total Inputs 36 (28 I/O + 7 dedicated + 1 clock) —
Operating Voltage (VCC) 5 V —
Program Type EPROM (one-time programmable, UV-erasable) —
Process Technology CMOS CMOS, UV-erasable
Gehäuse 44-pin PLCC (J-Lead) 68-pin PLCC (windowed ceramic)
Operating Temperature (JC suffix) 0°C to +70°C (commercial) —
Supply Current (ICC) [DATA_NEEDED: ICC maximum] —
RoHS-Status unknown [DATA_NEEDED: not stated in provided data]
Lead-Free Status unknown —
User I/O Pins — [DATA_NEEDED: user I/O count from datasheet]
Logic Elements — [DATA_NEEDED: total logic elements]
Propagation Delay (tPD) — [DATA_NEEDED: combinational tPD from datasheet]
Versorgungsspannung — 5 V
Betriebstemperatur — [DATA_NEEDED: commercial vs industrial grade temp range]
Speed Grade — JI-1 (commercial, -10/-12/-15 family)
Programmability — UV-erasable (windowed package)
Data Retention — 25 years (per MAX 5000 datasheet)
Montageart — Surface Mount

Datenblätter & Ressourcen

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