EPM5128GC vs EPM5128GC2 Vergleich

Detaillierter Direktvergleich von EPM5128GC von Altera und EPM5128GC2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5128GC EPM5128GC2
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $19,20 $54,00
Family MAX 5000 MAX 5000
Macrocells 128 —
Usable Gates 2,500 2.5K
Logic Elements / LABs [DATA_NEEDED: LAB count] —
User I/Os 68 —
Package Type WPGA (Windowed Ceramic Pin Grid Array) —
Package Code WPGA —
Number of Terminals 68 —
Terminal Form PIN/PEG (through-hole PGA with alignment pegs) —
Package Shape Square —
Temperature Grade Commercial —
Supply Voltage (Vcc) 5 V —
Process Technology CMOS, UV-erasable CMOS EPROM
Architecture EPLD, programmable AND/OR array with fixed OR plane AND/OR plane + programmable macro cell + PIA
Propagation Delay (tpd) [DATA_NEEDED: tpd in ns] —
Maximum Frequency (fmax) [DATA_NEEDED: fmax in MHz] —
Programmable Security Bit Yes —
Configuration Memory Non-volatile UV-EPROM (windowed ceramic) On-chip EPROM (no external boot device)
Montageart Through-Hole (PGA socket required) —
RoHS-Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Device Type — EPLD (Erasable Programmable Logic Device)
Macro Cells — 128
Logic Array Blocks (LABs) — 8 (16 macro cells each)
Maximum Internal Frequency — 50 MHz
Supply Voltage VCC — 5 V
I/O Pins — 64
Dedicated Inputs — 16
Gehäuse — Ceramic PGA (GC, windowed)
Programmable Flip-Flop Modes — D / T / JK / SR (selectable)
Reprogrammability — UV-erasable (windowed ceramic package)
Betriebstemperatur — [DATA_NEEDED: operating temperature range]
Pin-Anzahl — [DATA_NEEDED: total PGA pin count]

Datenblätter & Ressourcen

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