EPM5128GC vs EPM5128GC2 比較

詳細な並列比較: EPM5128GC メーカー: Altera および EPM5128GC2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EPM5128GC EPM5128GC2
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete Obsolete
在庫状況 In Stock In Stock
単価(USD) $19.20 $54.00
Family MAX 5000 MAX 5000
Macrocells 128 —
Usable Gates 2,500 2.5K
Logic Elements / LABs [DATA_NEEDED: LAB count] —
User I/Os 68 —
Package Type WPGA (Windowed Ceramic Pin Grid Array) —
Package Code WPGA —
Number of Terminals 68 —
Terminal Form PIN/PEG (through-hole PGA with alignment pegs) —
Package Shape Square —
Temperature Grade Commercial —
Supply Voltage (Vcc) 5 V —
Process Technology CMOS, UV-erasable CMOS EPROM
Architecture EPLD, programmable AND/OR array with fixed OR plane AND/OR plane + programmable macro cell + PIA
Propagation Delay (tpd) [DATA_NEEDED: tpd in ns] —
Maximum Frequency (fmax) [DATA_NEEDED: fmax in MHz] —
Programmable Security Bit Yes —
Configuration Memory Non-volatile UV-EPROM (windowed ceramic) On-chip EPROM (no external boot device)
実装タイプ Through-Hole (PGA socket required) —
RoHS ステータス [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Device Type — EPLD (Erasable Programmable Logic Device)
Macro Cells — 128
Logic Array Blocks (LABs) — 8 (16 macro cells each)
Maximum Internal Frequency — 50 MHz
Supply Voltage VCC — 5 V
I/O Pins — 64
Dedicated Inputs — 16
パッケージ — Ceramic PGA (GC, windowed)
Programmable Flip-Flop Modes — D / T / JK / SR (selectable)
Reprogrammability — UV-erasable (windowed ceramic package)
動作温度 — [DATA_NEEDED: operating temperature range]
ピン数 — [DATA_NEEDED: total PGA pin count]

データシート&リソース

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