EPM5130JI vs EPM5128JI Vergleich

Detaillierter Direktvergleich von EPM5130JI von Altera und EPM5128JI von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5130JI EPM5128JI
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $9,75 $23,95
Family MAX 5000 —
Device Type UV-Erasable EPLD (CMOS EPROM) UV-erasable programmable logic device (PLD)
Macrocells 128 128
Logic Array Blocks (LABs) 8 —
Maximale Taktfrequenz 33.3 MHz —
Propagation Delay (tPD) 55 ns 55 ns (typical)
External Clock Inputs 1 (shared input/clock) —
Interconnect Programmable Interconnect Array (PIA) —
Process Technology 0.75 micron CMOS EPROM CMOS
Versorgungsspannung 5 V (typical) [DATA_NEEDED: VCC range]
Input Logic Standard TTL-compatible —
Package Type Ceramic J-Leaded Chip Carrier (JLCC) with UV window —
Betriebstemperatur Commercial (0C to +70C) —
Program/Erase Method UV erasure through quartz window —
RoHS-Status Non-compliant (contains Pb in ceramic package) Non-compliant (ceramic hermetic package)
Lifecycle Obsolete - EOL by Altera/Intel —
Device Family — MAX 5000
Maximum Internal Frequency — 40 MHz
Programmable Technology — UV-erasable EPROM cell
Gehäuse — 68-terminal ceramic CQCC, windowed, J-leads
Operating Temperature Grade — Industrial ("I" suffix)
Programming — Altera MAX+plus II compatible programmer + UV eraser
Lead Finish — Tin-lead (SnPb) over nickel
Montageart — Surface Mount (J-lead CQCC)
Logic Blocks — [DATA_NEEDED: number of LABs / logic array blocks]
User I/O Pins — [DATA_NEEDED: pin count of user I/Os]
Standby Current — [DATA_NEEDED: ICCSB]

Datenblätter & Ressourcen

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