EPM5130JI vs EPM5128JI 对比

详细并排对比 EPM5130JI 出自 Altera 和 EPM5128JI 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5130JI EPM5128JI
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.75 $23.95
Family MAX 5000 —
Device Type UV-Erasable EPLD (CMOS EPROM) UV-erasable programmable logic device (PLD)
Macrocells 128 128
Logic Array Blocks (LABs) 8 —
最大时钟频率 33.3 MHz —
Propagation Delay (tPD) 55 ns 55 ns (typical)
External Clock Inputs 1 (shared input/clock) —
Interconnect Programmable Interconnect Array (PIA) —
Process Technology 0.75 micron CMOS EPROM CMOS
电源电压 5 V (typical) [DATA_NEEDED: VCC range]
Input Logic Standard TTL-compatible —
Package Type Ceramic J-Leaded Chip Carrier (JLCC) with UV window —
工作温度 Commercial (0C to +70C) —
Program/Erase Method UV erasure through quartz window —
RoHS 状态 Non-compliant (contains Pb in ceramic package) Non-compliant (ceramic hermetic package)
Lifecycle Obsolete - EOL by Altera/Intel —
Device Family — MAX 5000
Maximum Internal Frequency — 40 MHz
Programmable Technology — UV-erasable EPROM cell
封装 — 68-terminal ceramic CQCC, windowed, J-leads
Operating Temperature Grade — Industrial ("I" suffix)
Programming — Altera MAX+plus II compatible programmer + UV eraser
Lead Finish — Tin-lead (SnPb) over nickel
安装类型 — Surface Mount (J-lead CQCC)
Logic Blocks — [DATA_NEEDED: number of LABs / logic array blocks]
User I/O Pins — [DATA_NEEDED: pin count of user I/Os]
Standby Current — [DATA_NEEDED: ICCSB]

数据手册与资源

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