EPM5130WM883B-2 vs EPM5130WC-2 Vergleich
Detaillierter Direktvergleich von EPM5130WM883B-2 von Altera und EPM5130WC-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5130WM883B-2 | EPM5130WC-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $52,00 | $62,00 |
| Family | MAX 5000 | — |
| Device Type | UV PLD (UV-erasable programmable logic device) | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD, -2 grade) | 45 ns | — |
| Propagation Delay (tPD, -1 grade) | 55 ns (EPM5130WM883B base) | — |
| Dedicated Inputs | 19 | 19 |
| User I/O Pins | 48 | — |
| Total Inputs | 68 | — |
| Total Outputs | 48 | — |
| Interconnect | Programmable Interconnect Array (PIA) - 8 LAB channels | — |
| Process Technology | CMOS | CMOS |
| External Clock Inputs | 1 | — |
| Programming Method | UV-erasable (windowed package) | — |
| Development Tool | MAX+PLUS II | — |
| Military Processing | MIL-STD-883 Class B (883B suffix) | — |
| Betriebstemperatur | [DATA_NEEDED: military temperature range] | 0 °C to 70 °C (Commercial) |
| Gehäuse | [DATA_NEEDED: exact package code] | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-Erasable PLD (CPLD) |
| Macrocell Count | — | 128 |
| Propagation Delay (tPD) | — | 45 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| User I/O Lines | — | 48 |
| Total Inputs (I/O + dedicated) | — | 68 |
| Package Type | — | 100-terminal Ceramic CQFP (R-CQFP-G100), windowed, gull-wing |
| Terminal Pitch | — | 0.650 mm |
| Montageart | — | Surface Mount |
| Configuration Memory | — | UV-erasable CMOS EEPROM cells |
| Speed Grade | — | -2 (45 ns) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Logic Elements | — | AND/OR array with programmable macrocell register |