EPM5130WM883B-2 vs EPM5130WC-2 Comparison
Detailed side-by-side comparison of EPM5130WM883B-2 by Altera and EPM5130WC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5130WM883B-2
EPM5130WM883B-2 - 128-Macrocell MAX 5000 UV PLD | Altera | Military
EPM5130WM883B-2 ObsoleteAltera
EPM5130WC-2
EPM5130WC-2 - 128-Macrocell UV PLD MAX 5000 | Altera CQFP-100
EPM5130WC-2 ObsoleteSpecification Comparison
| Parameter | EPM5130WM883B-2 | EPM5130WC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $52.00 | $62.00 |
| Family | MAX 5000 | β |
| Device Type | UV PLD (UV-erasable programmable logic device) | β |
| Macrocells | 128 | β |
| Logic Array Blocks (LABs) | 8 | β |
| Propagation Delay (tPD, -2 grade) | 45 ns | β |
| Propagation Delay (tPD, -1 grade) | 55 ns (EPM5130WM883B base) | β |
| Dedicated Inputs | 19 | 19 |
| User I/O Pins | 48 | β |
| Total Inputs | 68 | β |
| Total Outputs | 48 | β |
| Interconnect | Programmable Interconnect Array (PIA) - 8 LAB channels | β |
| Process Technology | CMOS | CMOS |
| External Clock Inputs | 1 | β |
| Programming Method | UV-erasable (windowed package) | β |
| Development Tool | MAX+PLUS II | β |
| Military Processing | MIL-STD-883 Class B (883B suffix) | β |
| Operating Temperature | [DATA_NEEDED: military temperature range] | 0 Β°C to 70 Β°C (Commercial) |
| Package | [DATA_NEEDED: exact package code] | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| Device Family | β | MAX 5000 |
| Product Type | β | UV-Erasable PLD (CPLD) |
| Macrocell Count | β | 128 |
| Propagation Delay (tPD) | β | 45 ns |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V |
| User I/O Lines | β | 48 |
| Total Inputs (I/O + dedicated) | β | 68 |
| Package Type | β | 100-terminal Ceramic CQFP (R-CQFP-G100), windowed, gull-wing |
| Terminal Pitch | β | 0.650 mm |
| Mounting Type | β | Surface Mount |
| Configuration Memory | β | UV-erasable CMOS EEPROM cells |
| Speed Grade | β | -2 (45 ns) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| Logic Elements | β | AND/OR array with programmable macrocell register |