EPM5192-1LC vs EPM5130LC Vergleich
Detaillierter Direktvergleich von EPM5192-1LC von Altera und EPM5130LC von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192-1LC | EPM5130LC |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $19,40 | $15,60 |
| Family | MAX 5000 | MAX 5000 (EPM51xx) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 3,750 | — |
| Macrocells | 192 | 128 |
| Logic Array Blocks (LABs) | 4 | 8 |
| User I/O Pins | 64 | 48 |
| Maximum Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tpd) | [DATA_NEEDED: -1 speed grade tpd in ns] | — |
| Versorgungsspannung | 5 V | — |
| Process Technology | UV EPROM, erasable windowless | CMOS (0.7 um EPROM) |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| Gehäuse | 64-pin Ceramic J-Lead Chip Carrier (LC) | JLCC-68 (J-Lead Ceramic Chip Carrier) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: commercial/industrial/military grade] |
| RoHS-Status | Non-compliant (ceramic windowless package, lead-bearing termination) | Non-compliant (ceramic JLCC, contains lead) |
| Series | — | MAX 5000 |
| Total Inputs (Dedicated + I/O) | — | 68 |
| Dedicated Inputs | — | 19 |
| Propagation Delay (tPD) | — | 55 ns |
| Maximum Internal Clock Frequency | — | 50 MHz |
| Global Clock Inputs | — | 1 |
| Configuration Technology | — | UV-Erasable / OTP EPROM |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| I/O Standard | — | TTL-compatible |