EPM5192-1LC vs EPM5130LC 比較
詳細な並列比較: EPM5192-1LC メーカー: Altera および EPM5130LC メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192-1LC | EPM5130LC |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $19.40 | $15.60 |
| Family | MAX 5000 | MAX 5000 (EPM51xx) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 3,750 | — |
| Macrocells | 192 | 128 |
| Logic Array Blocks (LABs) | 4 | 8 |
| User I/O Pins | 64 | 48 |
| Maximum Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tpd) | [DATA_NEEDED: -1 speed grade tpd in ns] | — |
| 電源電圧 | 5 V | — |
| Process Technology | UV EPROM, erasable windowless | CMOS (0.7 um EPROM) |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| パッケージ | 64-pin Ceramic J-Lead Chip Carrier (LC) | JLCC-68 (J-Lead Ceramic Chip Carrier) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: commercial/industrial/military grade] |
| RoHS ステータス | Non-compliant (ceramic windowless package, lead-bearing termination) | Non-compliant (ceramic JLCC, contains lead) |
| Series | — | MAX 5000 |
| Total Inputs (Dedicated + I/O) | — | 68 |
| Dedicated Inputs | — | 19 |
| Propagation Delay (tPD) | — | 55 ns |
| Maximum Internal Clock Frequency | — | 50 MHz |
| Global Clock Inputs | — | 1 |
| Configuration Technology | — | UV-Erasable / OTP EPROM |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| I/O Standard | — | TTL-compatible |