EPM5192AGC84-20 vs EPM51929C Vergleich

Detaillierter Direktvergleich von EPM5192AGC84-20 von Altera und EPM51929C von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192AGC84-20 EPM51929C
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $41,20 $9,40
Product Type Complex Programmable Logic Device (CPLD) —
Family MAX 5000 —
Macrocells 192 —
User I/O Pins 64 —
Dedicated Inputs 7 —
Logic Gates (typical) [DATA_NEEDED: typical gate count] —
Maximum Clock Frequency (fMAX) 66.7 MHz —
Pin-to-Pin Delay (tPD) 20 ns —
Speed Grade -20 —
Gehäuse 84-pin Ceramic Pin Grid Array (CPGA, WPGA) —
Package Code WPGA —
Erasure Method UV-Erasable (with OTP window) —
Process Technology CMOS —
Operating Temperature Grade Commercial —
Versorgungsspannung [DATA_NEEDED: VCC range] [DATA_NEEDED: VCC range]
I/O Standard 5V CMOS / TTL compatible —
RoHS-Status [DATA_NEEDED: RoHS compliance] unknown
Montageart Through-Hole (Pin Grid Array socket) Surface Mount or Through-Hole (package dependent)
Device Family — MAX 5000
Device Type — EPLD (Erasable Programmable Logic Device)
Architecture — Multi-array matrix (PAL-based macrocells)
Logic Density — [DATA_NEEDED: usable gates]
Number of Macrocells — [DATA_NEEDED: macrocell count]
Anzahl der Pins — [DATA_NEEDED: pin count]
Package Type — [DATA_NEEDED: package suffix - C denotes commercial temperature grade]
Technology — CMOS EPROM
Programmability — UV-erasable, JEDEC fuse map
Betriebstemperatur — Commercial (0C to +70C)
Propagation Delay — [DATA_NEEDED: tpd specification]
Maximum Toggle Frequency — [DATA_NEEDED: fmax]
Lead-Free — unknown
MSL-Level — [DATA_NEEDED]

Datenblätter & Ressourcen

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