EPM5192AJC84-20 vs EPM5192ALC84-20 Vergleich

Detaillierter Direktvergleich von EPM5192AJC84-20 von Altera und EPM5192ALC84-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192AJC84-20 EPM5192ALC84-20
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $19,20 $19,40
Family MAX 5000 —
Device Type UV-erasable/OTP Complex PLD (CPLD) UV-Erasable/OTP Complex PLD (EPLD)
Macrocells 192 192
Propagation Delay (tpd) 33 ns (speed grade -20) —
Maximale Taktfrequenz 66.7 MHz —
Supply Voltage (Vcc) 4.75 V to 5.25 V —
Dedicated Inputs 7 —
User I/O Lines 64 —
Process Technology CMOS, UV-erasable EEPROM CMOS
Gehäuse 84-pin PLCC J-Lead (WQCCJ, J84) 84-pin PLCC (Plastic Leaded Chip Carrier)
Operating Temperature Grade Commercial —
Montageart Surface Mount (J-Lead) Surface Mount (PLCC socket-compatible)
MSL-Level [DATA_NEEDED: MSL level] —
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status not in provided web data]
Programming Tool Altera MAX+PLUS II / Quartus (legacy) —
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free status] —
Series — Altera MAX 5000
Speed Grade — -20 (20 ns pin-to-pin delay)
Terminal Pitch — 1.270 mm
Terminal Form — J-bend
Package Code — QCCJ (PLCC-84)
Package Shape — Square
Temperature Grade — Commercial
Programming Method — UV-erase + EPROM (One-Time-Programmable option)
Logic Family — MAX 5000 EPLD
I/O Compatibility — TTL-compatible
Configuration Memory — EPROM (UV-erasable)

Datenblätter & Ressourcen

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