EPM5192AJI84-15 vs EPM5192AJI84-20 Vergleich

Detaillierter Direktvergleich von EPM5192AJI84-15 von Altera und EPM5192AJI84-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192AJI84-15 EPM5192AJI84-20
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $27,80 $10,95
Device Family MAX 5000 EPLD MAX 5000 (EPM5192)
Product Type UV-Erasable / OTP Complex PLD —
Macrocells 192 —
Logic Array Blocks (LABs) 16 —
User I/O Pins 84 —
Propagation Delay (tPD) 15 ns 33 ns
Supply Voltage (VCC) 4.5 V to 5.5 V (nominal 5 V) 5 V nominal (4.5 V to 5.5 V)
Process Technology CMOS EPROM (UV-erasable) CMOS
Package Type 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI)
Montageart Through-Hole (SMD socket-compatible) Surface Mount
Betriebstemperatur -40 °C to +85 °C (Industrial, 'I' suffix) —
Programming Method UV erase + EPROM program via standard Altera programmer —
Design Tool Support MAX+PLUS II (legacy); not supported by modern Quartus Prime —
RoHS-Status unknown [DATA_NEEDED: RoHS status of EPM5192AJI84-20]
Lead-Free unknown —
Halogenfrei unknown —
Functional Equivalent (Plastic OTP) EPM5192AJC84-15 (windowless plastic JLCC, same die) —
Logic Cells / Macrocells — 192 macrocells
Device Type — UV-Erasable / OTP Complex PLD
Maximum Frequency (fCNT) — 66.7 MHz
Operating Temperature Grade — Industrial
Package Code — WQCCJ (JEDEC)
Terminal Form — J-Bend
Number of Terminals — 84
Programmability — UV-erasable window + OTP
Pin-Anzahl — 84
Lebenszyklusstatus — Obsolete (legacy Altera MAX 5000)

Datenblätter & Ressourcen

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