EPM5192AJI84-15 vs EPM5192AJI84-20 比較
詳細な並列比較: EPM5192AJI84-15 メーカー: Altera および EPM5192AJI84-20 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192AJI84-15 | EPM5192AJI84-20 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.80 | $10.95 |
| Device Family | MAX 5000 EPLD | MAX 5000 (EPM5192) |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 84 | — |
| Propagation Delay (tPD) | 15 ns | 33 ns |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | 5 V nominal (4.5 V to 5.5 V) |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS |
| Package Type | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window | 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) |
| 実装タイプ | Through-Hole (SMD socket-compatible) | Surface Mount |
| 動作温度 | -40 °C to +85 °C (Industrial, 'I' suffix) | — |
| Programming Method | UV erase + EPROM program via standard Altera programmer | — |
| Design Tool Support | MAX+PLUS II (legacy); not supported by modern Quartus Prime | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS status of EPM5192AJI84-20] |
| Lead-Free | unknown | — |
| ハロゲンフリー | unknown | — |
| Functional Equivalent (Plastic OTP) | EPM5192AJC84-15 (windowless plastic JLCC, same die) | — |
| Logic Cells / Macrocells | — | 192 macrocells |
| Device Type | — | UV-Erasable / OTP Complex PLD |
| Maximum Frequency (fCNT) | — | 66.7 MHz |
| Operating Temperature Grade | — | Industrial |
| Package Code | — | WQCCJ (JEDEC) |
| Terminal Form | — | J-Bend |
| Number of Terminals | — | 84 |
| Programmability | — | UV-erasable window + OTP |
| ピン数 | — | 84 |
| ライフサイクル状態 | — | Obsolete (legacy Altera MAX 5000) |