EPM5192AJI84-15 vs EPM5192ALI84-15 Vergleich

Detaillierter Direktvergleich von EPM5192AJI84-15 von Altera und EPM5192ALI84-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192AJI84-15 EPM5192ALI84-15
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $27,80 $9,95
Device Family MAX 5000 EPLD MAX 5000
Product Type UV-Erasable / OTP Complex PLD UV-Erasable / OTP Complex PLD
Macrocells 192 —
Logic Array Blocks (LABs) 16 —
User I/O Pins 84 —
Propagation Delay (tPD) 15 ns 25 ns (-15 speed grade)
Supply Voltage (VCC) 4.5 V to 5.5 V (nominal 5 V) —
Process Technology CMOS EPROM (UV-erasable) CMOS, non-volatile EPROM/OTP
Package Type 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window —
Montageart Through-Hole (SMD socket-compatible) Surface Mount (PLCC socket compatible)
Betriebstemperatur -40 °C to +85 °C (Industrial, 'I' suffix) —
Programming Method UV erase + EPROM program via standard Altera programmer —
Design Tool Support MAX+PLUS II (legacy); not supported by modern Quartus Prime —
RoHS-Status unknown [DATA_NEEDED: RoHS status]
Lead-Free unknown —
Halogenfrei unknown —
Functional Equivalent (Plastic OTP) EPM5192AJC84-15 (windowless plastic JLCC, same die) —
Logic Macrocells — 192
Dedicated Inputs — 7
Bidirectional I/O Pins — 64
Maximum Total Inputs — 72
Programmability — One-Time Programmable (windowless)
Gehäuse — 84-pin PQCC (PLCC, J-Lead)
JEDEC JESD-30 Code — S-PQCC-J84
Terminal Form — J Bend (J-Lead)
Operating Temperature Grade — Industrial
Betriebstemperaturbereich — [DATA_NEEDED: temperature range]
Versorgungsspannung — [DATA_NEEDED: VCC range]

Datenblätter & Ressourcen

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