EPM5192AQM100-20 vs EPM5192AQM100-15 Vergleich

Detaillierter Direktvergleich von EPM5192AQM100-20 von Intel und EPM5192AQM100-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192AQM100-20 EPM5192AQM100-15
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $8,20 $16,20
Device Family MAX 5000 (EPLD / classic CPLD) —
Logic Elements 192 macrocells across 12 Logic Array Blocks (LABs) —
Number of LABs 12 —
User I/O Lines 64 —
Dedicated Inputs 7 7
Pin-to-Pin Propagation Delay (tPD) 33 ns —
Maximum Clock Frequency (fMAX) 66.7 MHz —
Gehäuse 100-pin PQFP (JESD-30 code R-PQFP-G100) PQFP-100 (R-PQFP-G100)
Montageart Surface Mount Surface Mount
Process Technology CMOS EPROM-based CMOS
Configuration Memory On-chip EPROM (non-volatile, one-time programmable in this package) —
Boundary-Scan Test JTAG / IEEE 1149.1 compatible —
External Clock Input Yes (global clock pin) —
Operating Temperature Grade [DATA_NEEDED: explicit temperature grade from datasheet] —
Versorgungsspannung [DATA_NEEDED: VCC range from datasheet] 5 V (typical, single supply)
RoHS-Status [DATA_NEEDED: verified from manufacturer product page] [DATA_NEEDED: RoHS status]
Family — MAX 5000
Device Type — EPLD (Erasable PLD)
Logic Array Blocks (LABs) — 12
Interconnect Architecture — Product Term Sharing (PIA)
User I/O Pins — 64
Total Inputs — 72
Pin-to-Pin Delay (tPD) — 25 ns
Speed Grade — -15 (15 ns macrocell delay)
Programming Technology — EPROM (UV-erasable)
Betriebstemperatur — [DATA_NEEDED: operating temperature range]

Datenblätter & Ressourcen

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