EPM5192GC-2 vs EPM5192JC Vergleich

Detaillierter Direktvergleich von EPM5192GC-2 von Altera und EPM5192JC von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192GC-2 EPM5192JC
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $92,00 $16,40
Family MAX 5000 —
Macrocells 192 192
Logic Array Blocks 16 (LABs of 16 macrocells each) —
Usable I/O Pins [DATA_NEEDED: exact user I/O count for PGA package] —
Propagation Delay (tPD) 12 ns typical (-2 grade) —
Counter Frequency 100 MHz minimum —
Supply Voltage (VCC) 5 V nominal —
Technology CMOS EPROM —
Programmable Technology UV-erasable / one-time programmable —
Programming Toolchain Altera MAX+PLUS II —
Package Type Pin Grid Array (PGA), ceramic —
Betriebstemperatur Commercial (0C to +70C) [DATA_NEEDED: commercial / industrial / military grade]
Speed Grade -2 —
RoHS-Status Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) [DATA_NEEDED: original Altera marking not RoHS]
Montageart Through-hole (PGA socket) Surface Mount
Product Type — CPLD (Complex Programmable Logic Device)
Series — EPM5192 (Classic / MAX-class)
Logic Array Blocks (LABs) — 12
Interconnect Architecture — Programmable Interconnect Array (PIA)
Process Technology — CMOS EPROM (UV-erasable)
Gehäuse — 68-pin PLCC (JC) windowed ceramic
Programming Method — UV-erase + EPROM programmer
Non-Volatile Configuration — Yes (EPROM cell array)
Logic Family — Classic CPLD (EPM5xxx series)
Versorgungsspannung — [DATA_NEEDED: VCC nominal]
Propagation Delay — [DATA_NEEDED: tpd spec by speed grade]

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