EPM5192JC-1N vs EPM5192JI-1 Vergleich
Detaillierter Direktvergleich von EPM5192JC-1N von Altera und EPM5192JI-1 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192JC-1N | EPM5192JI-1 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $19,85 | $17,40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD - Complex Programmable Logic Device | CMOS UV-Erasable Programmable Logic Device (PLD / EPLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Usable Gates | 3750 | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs (GCLK) | 1 | — |
| Propagation Delay (tPD) | 40 ns | 55 ns |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 4.5 V to 5.5 V (nominal 5 V) |
| Technology | CMOS EPROM (UV-erasable) | — |
| Gehäuse | 84-pin Ceramic Quad Flat Pack (CQFP) | 84-pin JLCC (Windowed ceramic J-lead) |
| JEDEC Package Code | S-CQCC-J84 | — |
| Betriebstemperatur | [DATA_NEEDED: industrial/commercial temperature range] | Industrial, -40 C to +85 C |
| Programming Interface | JTAG / Altera ByteBlaster | — |
| Process Technology | — | CMOS EPROM |
| Configuration Memory | — | UV-erasable EPROM |
| Programming Method | — | External EPROM programmer (via programming hardware) |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance] |
| Speed Grade | — | -1 (slowest grade in EPM5192 family) |
| Logic Element per Macrocell | — | 1 D flip-flop + AND/OR array |