EPM5192JC-2 vs EPM5192JC84-1 Vergleich
Detaillierter Direktvergleich von EPM5192JC-2 von Altera und EPM5192JC84-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192JC-2 | EPM5192JC84-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $22,50 | $15,20 |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable Programmable Logic Device (PLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns | — |
| Maximale Taktfrequenz | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| Gehäuse | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) |
| Montageart | Surface Mount | Surface Mount |
| Number of Terminals | 84 | — |
| Programming Method | UV-erase / EPROM | — |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Type | — | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) |
| Family | — | MAX 5000 |
| Propagation Delay (tpd) | — | 40 ns (worst case) |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V (5 V ±5 %) |
| Operating Temperature Grade | — | Commercial |
| JESD-30 Package Code | — | S-CQCC-J84 |
| Terminal Form | — | J-BEND |
| Package Shape | — | SQUARE |
| Programmability | — | UV-erasable (window) / OTP in production |
| Configuration Memory | — | EPROM (non-volatile, instant-on) |