EPM5192JC-2 vs EPM5192JC84-1 Comparación
Comparación detallada lado a lado de EPM5192JC-2 por Altera y EPM5192JC84-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192JC-2 | EPM5192JC84-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,50 | $15,20 |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable Programmable Logic Device (PLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns | — |
| Frecuencia de reloj máxima | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| Encapsulado | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Number of Terminals | 84 | — |
| Programming Method | UV-erase / EPROM | — |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Type | — | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) |
| Family | — | MAX 5000 |
| Propagation Delay (tpd) | — | 40 ns (worst case) |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V (5 V ±5 %) |
| Operating Temperature Grade | — | Commercial |
| JESD-30 Package Code | — | S-CQCC-J84 |
| Terminal Form | — | J-BEND |
| Package Shape | — | SQUARE |
| Programmability | — | UV-erasable (window) / OTP in production |
| Configuration Memory | — | EPROM (non-volatile, instant-on) |