EPM5192JI vs EPM5192GI Vergleich
Detaillierter Direktvergleich von EPM5192JI von Altera und EPM5192GI von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192JI | EPM5192GI |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,75 | $18,95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-erasable CMOS Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 16 (12 macrocells per LAB) |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tpd) | 55 ns | — |
| Versorgungsspannung | 4.75 V to 5.25 V (nominal 5 V) | — |
| Technology | CMOS EPROM, UV-erasable | CMOS EPROM (UV-erasable / OTP) |
| Gehäuse | 84-pin PLCC (windowed, J-suffix ceramic) | — |
| Betriebstemperatur | -40 C to +125 C (industrial, I-suffix) | -40 C to +85 C (Industrial) |
| Montageart | Surface Mount (PLCC socket recommended for UV erasure) | Through-hole (PGA) |
| RoHS-Status | [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant] | [DATA_NEEDED: not confirmed in verified web data] |
| Programming Method | Altera MAX 5000 programming algorithm (device programmer) | — |
| Erasure Method | UV exposure through windowed package | — |
| Total Inputs | — | 72 |
| Propagation Delay (tPD) | — | 55 ns |
| Maximum Internal Frequency (fCNT) | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| Package Type | — | 84-pin PGA (Pin Grid Array), ceramic with quartz window |
| Programmable | — | UV-erasable (windowed) and OTP variants |