EPM5192LC vs EPM5192JC Vergleich

Detaillierter Direktvergleich von EPM5192LC von Altera und EPM5192JC von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192LC EPM5192JC
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $28,40 $16,40
Family MAX 7000S —
Macrocells 192 192
Logic Array Blocks (LABs) 12 12
User I/O Pins 64 —
Dedicated Inputs 7 —
Global Clock Inputs 1 —
Propagation Delay (tPD) 55 ns (typical, commercial) —
Maximum Clock Frequency (fMAX) 50 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) —
Process Technology CMOS, UV-erasable/OTP EPROM configuration CMOS EPROM (UV-erasable)
Programmable Interconnect Programmable Interconnect Array (PIA), fixed delay —
Boundary-Scan Support JTAG IEEE 1149.1 —
Programming Interface JTAG (ByteBlaster-compatible) —
Operating Temperature (commercial) 0C to +70C —
Gehäuse JLCC-68 (windowed ceramic, LC suffix) 68-pin PLCC (JC) windowed ceramic
Montageart Surface Mount Surface Mount
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: original Altera marking not RoHS]
Product Type — CPLD (Complex Programmable Logic Device)
Series — EPM5192 (Classic / MAX-class)
Interconnect Architecture — Programmable Interconnect Array (PIA)
Programming Method — UV-erase + EPROM programmer
Non-Volatile Configuration — Yes (EPROM cell array)
Logic Family — Classic CPLD (EPM5xxx series)
Betriebstemperatur — [DATA_NEEDED: commercial / industrial / military grade]
Versorgungsspannung — [DATA_NEEDED: VCC nominal]
Propagation Delay — [DATA_NEEDED: tpd spec by speed grade]

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