EPM5192LC84 vs EPM5192LC-1 Vergleich
Detaillierter Direktvergleich von EPM5192LC84 von Altera und EPM5192LC-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192LC84 | EPM5192LC-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,95 | $14,20 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Gehäuse | LCC-84 (PQCC84, MS-018) | — |
| Pin-Anzahl | 84 | — |
| Montageart | Surface Mount (Socket-compatible) | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | 5 V nominal (4.75 V to 5.25 V) |
| User I/O | [DATA_NEEDED: max user I/O count] | 64 |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| RoHS-Status | unknown | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | EPLD / CPLD |
| Macrocells | — | 192 |
| Logic Gates | — | 3750 (typical usable) |
| Dedicated Inputs | — | 7 |
| Anzahl der Pins | — | 84 |
| Package Type | — | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Propagation Delay | — | 25 ns |
| Maximale Taktfrequenz | — | 50 MHz |
| Technology | — | CMOS, UV-erasable / OTP EPROM cell |
| Programmable Memory | — | EPROM (one-time or UV-erasable) |
| Speed Grade | — | -1 |