EPM5192LC84 vs EPM5192LC-1 Comparación
Comparación detallada lado a lado de EPM5192LC84 por Altera y EPM5192LC-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192LC84 | EPM5192LC-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $15,95 | $14,20 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Encapsulado | LCC-84 (PQCC84, MS-018) | — |
| Recuento de pines | 84 | — |
| Tipo de montaje | Surface Mount (Socket-compatible) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Tensión de alimentación | [DATA_NEEDED: VCC range] | 5 V nominal (4.75 V to 5.25 V) |
| User I/O | [DATA_NEEDED: max user I/O count] | 64 |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| Estado RoHS | unknown | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | EPLD / CPLD |
| Macrocells | — | 192 |
| Logic Gates | — | 3750 (typical usable) |
| Dedicated Inputs | — | 7 |
| Número de pines | — | 84 |
| Package Type | — | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Propagation Delay | — | 25 ns |
| Frecuencia de reloj máxima | — | 50 MHz |
| Technology | — | CMOS, UV-erasable / OTP EPROM cell |
| Programmable Memory | — | EPROM (one-time or UV-erasable) |
| Speed Grade | — | -1 |