EPM5192LC84 vs EPM5192LI84 Vergleich
Detaillierter Direktvergleich von EPM5192LC84 von Altera und EPM5192LI84 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192LC84 | EPM5192LI84 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,95 | $21,60 |
| Product Type | Complex Programmable Logic Device (CPLD) | UV-Erasable/OTP Complex PLD (CPLD) |
| Family | MAX 5000 | — |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Gehäuse | LCC-84 (PQCC84, MS-018) | — |
| Pin-Anzahl | 84 | — |
| Montageart | Surface Mount (Socket-compatible) | Surface Mount (socket-compatible) |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | — |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | — |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | OTP / UV-erasable EPROM |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Device Family | — | MAX 5000 |
| Usable Gates | — | 3,750 gates |
| Macro Cells | — | 192 |
| Maximum Toggle Frequency | — | 40 MHz |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| User I/O Pins | — | 64 (max) |
| Betriebstemperaturbereich | — | -40 °C to +85 °C (industrial) |
| Package Type | — | 84-pin PLCC (J-lead, package code J84/QCCJ) |
| Programming Method | — | Stand-alone programmer (no JTAG on LI84 OTP variant) |
| Logic Compatibility | — | TTL-compatible I/O |