EPM5192LC84 vs EPM5192LI84 比較
詳細な並列比較: EPM5192LC84 メーカー: Altera および EPM5192LI84 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192LC84 | EPM5192LI84 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.95 | $21.60 |
| Product Type | Complex Programmable Logic Device (CPLD) | UV-Erasable/OTP Complex PLD (CPLD) |
| Family | MAX 5000 | — |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| パッケージ | LCC-84 (PQCC84, MS-018) | — |
| ピン数 | 84 | — |
| 実装タイプ | Surface Mount (Socket-compatible) | Surface Mount (socket-compatible) |
| 動作温度 | [DATA_NEEDED: operating temperature range] | — |
| 電源電圧 | [DATA_NEEDED: VCC range] | — |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | OTP / UV-erasable EPROM |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS compliance status] |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Device Family | — | MAX 5000 |
| Usable Gates | — | 3,750 gates |
| Macro Cells | — | 192 |
| Maximum Toggle Frequency | — | 40 MHz |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| User I/O Pins | — | 64 (max) |
| 動作温度範囲 | — | -40 °C to +85 °C (industrial) |
| Package Type | — | 84-pin PLCC (J-lead, package code J84/QCCJ) |
| Programming Method | — | Stand-alone programmer (no JTAG on LI84 OTP variant) |
| Logic Compatibility | — | TTL-compatible I/O |