EPM570F256C4N vs EPM570F256I5 Vergleich
Detaillierter Direktvergleich von EPM570F256C4N von Intel und EPM570F256I5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM570F256C4N | EPM570F256I5 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $26,85 | $12,60 |
| Series | MAX II | — |
| Logic Elements | 570 LE | — |
| Macrocells | 440 | — |
| Logic Array Blocks (LABs) | 57 | — |
| User I/O Count | 160 | — |
| User Flash Memory (UFM) | 8 Kbit | 8 Kbits |
| Gehäuse | 256-ball FineLine BGA (FBGA) | — |
| Package Size | 17 mm × 17 mm | — |
| Process Technology | 0.18 µm 6-layer-metal flash | — |
| Maximum Internal Frequency | 304 MHz | [DATA_NEEDED: fMAX MHz per speed grade] |
| Pin-to-Pin Logic Delay | 5.4 ns | — |
| Operating Supply Voltage (VCCINT) | 2.5 V, 3.3 V | — |
| MultiVolt I/O Voltages | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| Betriebstemperaturbereich | 0 °C to +70 °C (commercial) | — |
| In-System Programmability (ISP) | Yes (JTAG) | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Family | — | MAX II |
| Logic Elements (LE) | — | 570 |
| Maximum User I/O Pins | — | 160 |
| Number of LABs/CLBs | — | [DATA_NEEDED: number of LABs] |
| Package Type | — | 256-ball FineLine BGA (FBGA-256) |
| Betriebstemperatur | — | -40C to +85C (industrial) |
| Supply Voltage - Core | — | 3.3 V (also operates at 3.3V per part description) |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, PCI |
| MultiVolt I/O | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| In-System Programmability | — | Yes |
| Non-volatile Configuration | — | Yes (on-chip flash) |
| Pin-to-Pin Logic Delay (typ) | — | 5 ns to 7 ns |
| Number of PLLs | — | [DATA_NEEDED: number of PLLs] |
| Width | — | 17 mm (per Partstack) |
| Speed Grade | — | I5 |