EPM570GT100C3N vs EPM570GT100I5 Vergleich
Detaillierter Direktvergleich von EPM570GT100C3N von Altera und EPM570GT100I5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM570GT100C3N | EPM570GT100I5 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,90 | $4,95 |
| Family | MAX II | — |
| Series | MAX II G (Green) | MAX II |
| Logic Elements | 570 | — |
| Macrocells | 440 | 440 |
| User I/O Pins | 76 | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Propagation Delay (tPD max) | 5.4 ns | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V typical) | — |
| I/O Voltage Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 um | — |
| Betriebstemperatur | 0C to 85C (TJ, commercial) | -40 C to +100 C (Industrial, "I5") |
| Gehäuse | 100-pin TQFP (14x14 mm) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Montageart | Surface Mount | Surface Mount (Gull-wing leads) |
| Programmable Type | In-System Programmable (Flash, non-volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| RoHS-Status | Lead free / RoHS Compliant | Compliant |
| Logic Elements (LE) | — | 570 |
| Maximum User I/O Pins | — | 76 |
| Propagation Delay (tPD) | — | 5.4 ns (typ) |
| Internal Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| User I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Programmability | — | In-System Programmable (ISP) via JTAG, non-volatile flash |
| Configuration Time | — | Instant-On (< 1 ms, no external PROM required) |
| Typical Active Current | — | [DATA_NEEDED: typical active ICC] |
| Speed Grade | — | GT (fast) |
| JTAG Support | — | IEEE 1149.1 boundary scan |
| Global Clock Networks | — | 4 |