EPM570GT100C5N vs EPM570GT100I5N Vergleich
Detaillierter Direktvergleich von EPM570GT100C5N von Intel und EPM570GT100I5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM570GT100C5N | EPM570GT100I5N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,05 | $16,50 |
| Series | MAX II | — |
| Logic Elements | 570 | 570 LE |
| Equivalent Macrocells | 440 | 440 macrocells |
| User I/O | 76 | — |
| LABs | 36 | — |
| Maximum Frequency | 304 MHz | — |
| Pin-to-Pin Delay | [DATA_NEEDED: tPD value] | — |
| User Flash Memory (UFM) | 8 Kbit | — |
| Operating Supply Voltage (VCCINT) | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS | — |
| Gehäuse | TQFP-100 | 100-pin TQFP (GT100) |
| Montageart | Surface Mount | Surface Mount (SMD/SMT) |
| Betriebstemperatur | 0C to +85C (Commercial) | -40 °C to +100 °C (Industrial) |
| Programmability | Flash-based, non-volatile (ISP via JTAG) | — |
| JTAG Support | IEEE 1149.1 boundary scan | Yes (IEEE 1149.1 boundary-scan) |
| RoHS-Status | Compliant | Compliant |
| Family | — | MAX II |
| Number of LABs | — | 57 |
| User I/Os | — | 76 |
| Maximum Operating Frequency | — | 304 MHz |
| Propagation Delay (tPD1) | — | 5.4 ns |
| Operating Supply Voltage (Core) | — | 1.8 V |
| User Flash Memory | — | 8 Kbit |
| Process | — | 0.18 µm, 6-layer-metal flash |
| MultiVolt I/O Support | — | 1.8 V / 2.5 V / 3.3 V |
| Internal Oscillator | — | Yes |
| Non-volatile Configuration | — | Yes (instant-on, no external boot PROM) |