EPM570GT100C5N vs EPM570GT100I5N 比較
詳細な並列比較: EPM570GT100C5N メーカー: Intel および EPM570GT100I5N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570GT100C5N | EPM570GT100I5N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $11.05 | $16.50 |
| Series | MAX II | — |
| Logic Elements | 570 | 570 LE |
| Equivalent Macrocells | 440 | 440 macrocells |
| User I/O | 76 | — |
| LABs | 36 | — |
| Maximum Frequency | 304 MHz | — |
| Pin-to-Pin Delay | [DATA_NEEDED: tPD value] | — |
| User Flash Memory (UFM) | 8 Kbit | — |
| Operating Supply Voltage (VCCINT) | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS | — |
| パッケージ | TQFP-100 | 100-pin TQFP (GT100) |
| 実装タイプ | Surface Mount | Surface Mount (SMD/SMT) |
| 動作温度 | 0C to +85C (Commercial) | -40 °C to +100 °C (Industrial) |
| Programmability | Flash-based, non-volatile (ISP via JTAG) | — |
| JTAG Support | IEEE 1149.1 boundary scan | Yes (IEEE 1149.1 boundary-scan) |
| RoHS ステータス | Compliant | Compliant |
| Family | — | MAX II |
| Number of LABs | — | 57 |
| User I/Os | — | 76 |
| Maximum Operating Frequency | — | 304 MHz |
| Propagation Delay (tPD1) | — | 5.4 ns |
| Operating Supply Voltage (Core) | — | 1.8 V |
| User Flash Memory | — | 8 Kbit |
| Process | — | 0.18 µm, 6-layer-metal flash |
| MultiVolt I/O Support | — | 1.8 V / 2.5 V / 3.3 V |
| Internal Oscillator | — | Yes |
| Non-volatile Configuration | — | Yes (instant-on, no external boot PROM) |