EPM570T100C3N vs EPM570F100C5N Vergleich
Detaillierter Direktvergleich von EPM570T100C3N von Intel und EPM570F100C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM570T100C3N | EPM570F100C5N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,10 | $5,20 |
| Family | MAX II | MAX II |
| Macro Cells | 440 | — |
| Logic Elements (LEs) | 570 | — |
| Maximum User I/Os | 76 | — |
| Pin-to-Pin Delay (tPD1) | 5.4 ns | — |
| Maximum Internal Frequency | 304 MHz | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbit |
| Number of LABs | 57 | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) | 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL |
| Process Technology | 0.18 µm Flash | 0.18 micron CMOS |
| Gehäuse | 100-TQFP (T100) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to +85 °C (Commercial) | 0C to 85C (TJ) |
| Programming Interface | JTAG / IEEE 1149.1 boundary-scan | JTAG (IEEE 1149.1) |
| In-System Programmable | Yes | — |
| RoHS-Status | Compliant | — |
| Speed Grade | C3 | — |
| Logic Elements | — | 570 |
| Number of Macrocells | — | 440 |
| User I/Os | — | 76 |
| Number of Logic Array Blocks | — | 57 |
| Propagation Delay (tPD) | — | 5.4 ns |
| Supply Voltage - Internal | — | 2.5 V, 3.3 V |
| Gehäuse / Bauform | — | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch |
| Supplier Device Package | — | 100-FBGA |
| Configuration Memory | — | On-chip Flash (instant-on, non-volatile) |
| In-System Programmability | — | Yes (JTAG, IEEE 1532) |
| Lead Free / RoHS | — | Yes (per verified data) |