EPM570T100C3N vs EPM570F100C5N 对比

详细并排对比 EPM570T100C3N 出自 Intel 和 EPM570F100C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570T100C3N EPM570F100C5N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $8.10 $5.20
Family MAX II MAX II
Macro Cells 440 —
Logic Elements (LEs) 570 —
Maximum User I/Os 76 —
Pin-to-Pin Delay (tPD1) 5.4 ns —
Maximum Internal Frequency 304 MHz —
User Flash Memory (UFM) 8 Kbits 8 Kbit
Number of LABs 57 —
Supply Voltage - Core 2.5 V / 3.3 V —
I/O Standards Supported 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL
Process Technology 0.18 µm Flash 0.18 micron CMOS
封装 100-TQFP (T100) —
安装类型 Surface Mount Surface Mount
工作温度 0 °C to +85 °C (Commercial) 0C to 85C (TJ)
Programming Interface JTAG / IEEE 1149.1 boundary-scan JTAG (IEEE 1149.1)
In-System Programmable Yes —
RoHS 状态 Compliant —
Speed Grade C3 —
Logic Elements — 570
Number of Macrocells — 440
User I/Os — 76
Number of Logic Array Blocks — 57
Propagation Delay (tPD) — 5.4 ns
Supply Voltage - Internal — 2.5 V, 3.3 V
封装 / 外壳 — 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch
Supplier Device Package — 100-FBGA
Configuration Memory — On-chip Flash (instant-on, non-volatile)
In-System Programmability — Yes (JTAG, IEEE 1532)
Lead Free / RoHS — Yes (per verified data)

数据手册与资源

浏览全部产品 创建 BOM 获取报价